1. Technical Field
The present invention relates to a semiconductor device having a semiconductor chip bonded to a printed circuit board.
2. Related Art
Compatibility to applications utilizing larger electric current, lower resistance and an improved heat release characteristics are required for semiconductor elements employed in electrical power applications. Since vertical metal oxide semiconductor (MOS) transistors or diodes among such semiconductor elements, for example, have configurations including electrodes on a front surface and a back surface of the semiconductor chip, it is necessary to respectively connect a front surface electrode and a back surface electrode to conductive materials of the mounting substrate, when it is to be mounted. Such type of technologies includes a technology described in U.S. Pat. No. 6,133,634 to Joshi.
U.S. Pat. No. 6,133,634 describes a semiconductor device including a silicon die carried inside a cavity of a carrier made of a metal such as copper (Cu). Since the back surface of the silicon die is opposed to the carrier in this device, the silicon die is to be flip chip-bonded to a printed circuit board in a face-down orientation.
However, further investigation on the technology described in U.S. Pat. No. 6,133,634 conducted by the present inventors clarified that there is a room for improving the durability thereof in the situation of changing the temperature. More specifically, a multiple-layered structure of thin films is provided on an element formation surface of the semiconductor chip that is flip chip-bonded to the printed circuit board, and the two-dimensional structure thereof is also miniaturized. However, relatively larger temperature variation is repeatedly occurred in the device including a power element, when the power element is switched or when the environmental temperature is changed after mounting the semiconductor chip. Therefore, there is a concern that a deterioration due to a temperature variation may be occurred in a region having a fine structure in the element formation surface and more specifically in the front surface electrode or the vicinity thereof.